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TSMC SoIC package will be mass produced! Using 3D inter-chip stacking technology.

  • Publié:2020-11-20 03:01:37
  • Viens de:CMS
  • Nombre de clics:144

TSMC reported that it is cooperating with American technology giants to jointly develop system-on-chip (SoIC) innovative packaging technology, using 3D inter-chip stacking technology to make semiconductors more powerful.


The Nikkei Asian Review reported on the 18th that the development of Moore's Law has slowed down, and the number of transistors that a chip can squeeze into is becoming more and more limited, highlighting the importance of chip packaging technology.

SoIC.png

TSMC has now decided to use a 3D stacking technology called SoIC to stack and connect several different chips, such as processors, memories, and sensors, into the same package. This method can make the chipset smaller, more powerful, and more power efficient.


According to sources, TSMC plans to introduce the latest 3D IC packaging technology in the Miaoli chip packaging plant. Google and Advanced Micro Devices (AMD) will be the first SoIC chip customers. These American technology giants will assist TSMC in testing and certification operations. According to news, Google intends to apply SoIC chips to self-driving car systems, and AMD hopes to create chip products that surpass Intel.


Chip packaging experts familiar with the details revealed that TSMC is expected to lock high-quality customers in its own chip packaging ecosystem through SoIC technology, because customers who need high-end chips are usually more willing to try new technologies. TSMC does not want to replace traditional chip packaging factories, but only wants to serve top quality customers, so that Apple, Google, AMD, Nvidia and other chip developers with deep pockets will not fall into the arms of competitors.


Some market observers believe that TSMC’s unique packaging service is one of the reasons why Apple is willing to exclusively entrust the iPhone processor to TSMC’s foundry.

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